Method for Estimating a Noise Generated in an Electronic System and Related Method for Testing Noise Immunity

ABSTRACT

The invention concerns a method for testing immunity to noise derived from interferences between components in a mixed analogic and digital electronic system. The method comprises determining by simulating the highest-level noise observed in the system, or the worst noise generated by interferences. If a test for noise sensitivity is successful with this injected worst noise, then the system is accepted. In the case where the worst noise test fails, the method comprises calculating by simulating the lowest-level noise observed in the system, or the injected best noise. If a test for noise sensitivity fails with this injected best signal, then the system is rejected.

The present invention relates to a method for estimating the noisegenerated in an electronic system and a related method for testingimmunity. The invention is aimed especially at determining the efficientoperation or malfunctioning of the system through an analysis of a noisein this system. The invention can be applied to particular advantage inthe field of combined electronic systems comprising analog and digitalcomponents. Non-exhaustive examples of such systems are electronicsystems containing integrated circuits on a single silicon block or onseveral silicon substrates in a same package as well as assemblies ofcomponents (whether integrated or not) on a printed circuit.

The manufacture of these electronic systems is a highly costlyoperation, especially when the system has one or more componentsintegrated on silicon. Thus, before starting large-scale manufacture, itis indispensable to control all the manufacturing parameters and to givevalues to certain parameters so as to maximise the probability that themanufactured circuit will work well.

To this end, there is a set of software products called “electronicdesign automation tools” used to assist in the designing of electronicsystems, starting from the description of the specifications of thesystem to be made up and going up to the making of the photographicmasks used in the manufacture of the system.

One of the major elements used to design an electronic system is thequantifying of the noise produced by the circuits, especially in acombined system. To this end, the method identifies the noise-generatingcircuits (known as aggressors) and the noise-sensitive circuits (knownas victims).

More specifically, the circuits of the system can all be considered tobe noise-generators (aggressors). However, it is preferable to choosenoise-generating circuits from the group comprising: digital circuits,memory cells, analog and radio-frequency (RF) circuits such as VCOs(voltage control oscillators), power amplifiers and input/outputcircuits. In particular, digital circuits tend to generate noise whentheir input signals are switched over. Naturally, a circuit having atleast one noise-generating circuit is itself considered to be anoise-generating circuit.

Noise-sensitive circuits (or victims) are chosen from the groupcomprising: analog and RF circuits, such as amplifiers, filters,oscillators, mixers, sample-and-hold circuits, memory type digitalcircuits, phase-locked loops, input/output circuits and voltagereferences. Naturally, a circuit comprising at least one noise-sensitivecircuit is itself considered to be a noise-sensitive circuit.

The noise generated by the aggressors spreads towards the victims, inpassing through the substrate on which the circuits are mounted, themetallic interconnections and the packages. This noise tends to impairthe performance of the victims. Thus, the term “noise” is understood tomean any signal generated by an aggressor block which has an undesiredeffect on the victims.

Software programs such as SPICE are used to analyse the effects of theaggressor blocks on the victims. To this end, impedance models are addedto the SPICE models of the original combined system to model thesubstrate. It is thus possible to analyse the effect on the victims ofthe noise injected by the aggressors through the substrate. However, forbig electronic systems comprising several millions of transistors orlogic gates, typically when the system comprises integrated circuits,the SPICE models need an excessive amount of system resources. For thesebig systems, the methods implemented are rather those that useapproximate models of the substrate and model the injection of noiseinto this substrate by current sources.

There is thus the known method described in the U.S. Pat. No. 6,941,258,in which an integrated circuit consisting of a set of cells isconsidered. A cell is an elementary system of the analog or digital typecircuit. A cell fulfils a given function and may, for example, take theform of a logic gate or a set of logic gates.

Each cell has an associated macro-model which models the noise injectedby the cell into the substrate, the parasitic elements of the cell andthe connection with the rest of the system. This macro-model comprisescurrent sources which inject a noise current into the substrate, forexample, a switching noise-current generated by the cell. Furthermore,the macro-model comprises resistors, capacitors and possibly inductorswhich model the links between the terminals of the cell, the powersupply nodes and the connection to the substrate.

To extract the current sources from the macro-model, the noise-currentinjected by the cell is computed by using a very detailed model ofsimulation of the cell. The noise associated with a cell is thencomputed by causing its inputs to be switched over. Switching patternsthat characterize the passage of the inputs of the cell from one stateto another are thus defined for a given extraction phase. And, during anapplication of these switching patterns to the input terminals of acell, the noise-generating currents of this cell are measured andextracted.

To compute the total noise of the circuit, the macro-models of the cellsand the noise signals that they generate are combined by introducing aswitching delay between the changes in state of the cells. For, thesecells do not all inject noise at the same time into the substrate. Thus,the macro-models and the noise signals are combined according to a modelof the switching instants of the cells of the circuit.

In practice, the method presented in the document U.S. Pat. No.6,941,258 proposes to compute a total macro-model of the entire circuitwhich is a combination of the macro-models of the cells of the circuit,while at the same time taking account of the shifts in the injection ofnoise by the cells into the rest of the integrated circuit. The noisesources of this total macro-model are thus combinations of the noisesources of the macro-models of each cell.

A noise-computation method of this kind is used to simulate theobservable noise in a single integrated circuit on silicon and givesresults close to reality. Indeed, the result of this simulation is closeto the result obtained by an all-transistor simulation of the digitalcircuit. However, a simulation method of this kind cannot be used tomake any definite assertion about the efficient operation of a circuit.Indeed, this method determines the noise injected solely into thesubstrate of the integrated circuit and in particular does not takeaccount of the noise associated with the interconnections of the cellswith one another whether on silicon, in packages or on a printedcircuit.

Furthermore, this method is a closest simulation that provides a preciseidea of the medium noise generated by the digital circuits. However,this method does not take account of cases of marginal operation of thesystem in terms of switching activity nor of a random factors inproduction that could impair the performance of the system.

The present invention therefore proposes to provide information ofgreater relevance on the noise injected into the electronic system sothat it becomes possible to find out with certainty if the desiredoperation of the system is appreciably affected or not affected by thenoise injected by its cells, especially by its digital cells.

To this end, a computation is made, in the invention, in a worst case,of the greatest noise that can be observed in the system. In one mode ofimplementation, to compute this noise, all the cells inject the greatestnoise that they can inject into the system.

If a test of noise sensitivity is successful in the worst case, i.e. ifthe noise computed in the system is below the tolerance thresholds ofthe sensitive circuits, then it is deduced from this that the system, inits best and worst conditions of operation in terms of noise and withits random factors of production, will be insensitive to the noisecreated by its digital cells. In this case, no additional test isnecessary.

By contrast, if the test fails, i.e. if the noise computed in the systemis greater than the tolerance thresholds of the sensitive circuits, thena computation is made by simulation, in the best case, of the lowestpossible noise that can be observed in the system. In one mode ofimplementation, to compute this noise, all the cells inject the lowestnoise that they can inject into the system.

If the test of noise sensitivity fails in this best case, then thearchitecture of the system is greatly open to question, and very oftenit is the entire system that must be modified in order to fulfill theconditions of immunity to noise. To this end, it will be necessary tomodify the positioning of the components, the distribution of theinput/output signals at the terminals of the integrated circuits and, ifnecessary, to introduce shielding around the victims of the noise. Afailure of the test in the best case can also dictate the use of acostlier package for the integrated circuits.

If the sensitivity test fails in the worst case but succeeds in the bestcase, then certain aspects of the system have to be modified. Othermodels can also be implemented, for example a model of the medium casein which the system is modeled with noise sources that inject a mediumnoise into the substrate. All these models of the system and the testsof noise sensitivity related to them give indications on the immunity tonoise of the system to be tested.

It must be noted that the extreme cases of noise injection are preparedin taking account of the reality of their occurrence. Indeed, for thebest and worst cases to have meaning it must be possible to encounterthem in a mode of operation of the system. The worst case (and the bestcase respectively) are therefore not excessively pessimistic (orexcessively optimistic) so as to give a precise idea of the immunity tonoise of the system studied.

To model the digital system and the noise injection in theabove-mentioned different cases, a macro-model is defined, for eachcircuit of the system, of the noise injected into the system through thesubstrate, the interconnections and the package of the cells. Thismacro-model has a set of sources representing the differentnoise-injection modes (worst and best cases) as well as a set of passiveelements, especially capacitors, resistors and inductors which reflectthe parasitic interactions between the different sources of the model aswell as the couplings with the substrate, the interconnections, and thepackage components. In practice, to determine the best and worst cases,the modeling of the noise sources is adjusted, with the passive elementsof the macro-models of the circuits remaining identical from one case toanother.

To this end, the current sources of this macro-model are extracted. Forthis purpose, first of all each cell is modeled as precisely as possiblethrough the use of the most complete possible models of transistorsavailable in the design kit of the elementary digital cells (orCorelib). Then, a test environment is defined for the cell to be tested,this environment being defined by input voltage sources comprising aparticular rise/fall time between two changes in state, a capacitiveload connected to each output of the cell as well as a power supplymodel.

The input voltage sources are subjected to switching patterns. Theseswitching patterns define the passage of the inputs of the cell from onevoltage level to another. These patterns may be exhaustive, i.e. all thepossible input variations will be input to the cell or they may bepseudo-exhaustive i.e. only one part of the possible input variationswill be input to the cell.

A SPICE simulation of the cell in its test environment gives waveforms(one waveform per switching pattern) for which a statisticalclassification is made. These waveforms may thus be classified as afunction of their spectral density. To this end, the waveforms aretransposed into the frequency domain and are then approximated bypolynomial functions which facilitate the storage of these waveforms andtheir re-use to reconstitute a sum of currents injected into the systemby a given block.

It is deemed to be the case that the greater the spectral density of awaveform, the greater is the noise generated (worst case). And thesmaller the spectral density of a waveform, the smaller is the noisegenerated (best case). For each cell, it is thus possible to identifyand extract noise sources for the worst case, the best case and themedium case. These noise sources are kept in a memory and arere-utilized from one system to another.

Digital blocks are then defined. These digital blocks comprise a set ofdigital cells. Thus, the term “circuit in an electronic system” isunderstood to mean elements that can be found at different hierarchicallevels of blocks. The first level is that of a component such as atransistor. The second level is that of an elementary function such asan AND gate or an OR gate. The third level is that of an assembly ofelementary functions used to fulfill a determined function, the numberof hierarchical levels being unlimited.

For the blocks of the system, an equivalent injection model is defined,modeling the injection of current noise during inrush current surges inthe cells. To this end, the invention chooses a modeling of theswitching activity that defines the instant at which the digital blocksor the cells forming them inject their noise into the system. The noisemay thus be computed in the system for blocks of different hierarchicallevels. The noises of these blocks can then be combined with one anotherto compute the total observable noise in the system.

This injection model can be refined in terms of definition of themacro-model, definition of the sets of parameters chosen for theextraction of the current sources in the different cases envisaged, andthe re-use of the noise sources within a block according to adescription of the instants of switching of the cells.

The method of the invention can be implemented with an electronic systemcomprising a single integrated circuit on silicon in its package,several integrated circuits on silicon in a package or severalelectronic components with, optionally, integrated circuits connected toa printed circuit.

The invention therefore relates to a method for the estimation of anoise generated in a combined digital and analog and/or radio-frequencytype system, this system comprising elementary cells that each fulfill afunction, this method comprising the following steps:

-   -   modeling each digital and/or analog and/or radio-frequency cell        by means of a noise injection macro-model, this macro-model        comprising current sources to model the noise injected into the        system by the cell,    -   extracting the current sources of the macro-models by        simulation;    -   defining a model of distribution of the instants of switching of        the digital cells, this distribution model defining the instants        at which the cells of the systems switch over;    -   re-using the current sources extracted in the macro-models        according to the distribution model defined, and    -   computing the observable noise within the system,        characterised in that the step for re-using the sources within        the macro-models comprises the following step:    -   injecting a marginal noise into the system that can be injected        by the current sources, this marginal noise being possibly the        worst and the best noise that can be injected by the current        sources during the functioning of the system, the worst noise        being the highest-level noise that can be injected by the        current sources during the functioning of the system, the best        noise being the lowest-level noise that can be injected by the        current sources during the functioning of the system.

The invention furthermore relates to a method for testing the immunityto noise of a combined digital and/or analog and/or radio frequency typesystem, this system comprising cells connected to one another throughnodes of the circuit, each node corresponding to a connection betweentwo cells or between a cell and a power supply network of the system,this method comprising the following steps:

-   -   modeling the digital cells by means of macro-models, these        macro-models comprising RLC type connection elements and noise        sources which model a noise injection by the cells in the        system,    -   connecting these macro-models with the rest of the system by        means of the connection elements of these macro-models,    -   using noise sources extracted in the macro-models so as to        inject noise into the system,    -   computing the noise levels in each node of the system, and    -   performing a test of sensitivity of this system to the noise        injected, the test being successful if the computed noise is        smaller than the sensitivity thresholds of the system and        failing if the computed noise is greater than the same        sensitivity thresholds,        characterised in that the step for re-using sources within the        macro-models comprising the following steps:    -   injecting the worst noise that can be injected by the cells into        the system, this worst noise being the greatest noise that can        be injected into the system by the cells during the operation of        the system, and    -   if the sensitivity test is successful with the worst noise        injected, accepting the circuit.

The invention will be understood more clearly from the followingdescription and from the accompanying figures. These figures are givenpurely by way of an illustration and in no way restrict the scope of theinvention. Of these figures:

FIG. 1 is a schematic view of a classic combined electronic systemcomprising digital and analog cells;

FIG. 2 is a schematic view of a prior-art macro-model modeling a digitalcell;

FIG. 3 is a schematic view of a cell and its test environment for theextraction of the noise sources in the method according to theinvention;

FIG. 4 is a block diagram representing the steps of extraction of thenoise sources of the macro-models and the re-use of these sources in themethod according to the invention;

FIG. 5 are graphic depictions of waveforms obtained in the time domainand in the frequency domain for different switching patterns during theextraction of the noise sources according to the invention;

FIG. 6 is a histogram representing the number of cells of the systemliable to be called at each time interval [ti ;ti+1 [;

FIG. 7 is a table according to the invention indicating a decision ofacceptance or non-acceptance of systems as a function of the results ofsensitivity tests in different cases of operation of these systems.

The identical elements keep the same reference from one figure to thenext.

FIG. 1 shows an integrated circuit 1 comprising digital and analogcircuits 2.1-2.4 performing elementary functions. These cells, which mayfor example be sets of logic gates, are mounted on a substrate 3 of thiscircuit 1. The digital cells inject a noise into this circuit when theyoperate in switching mode.

The injection of the noise from each digital cell into the substrate 3can be modeled by a known macro-model 4 represented in FIG. 2. Thismacro-model 4 has four current sources IPvdd, IPgnd, IBsub and IBcaiswhich model the noise that is generated by the switching of the NMOS andPMOS transistors and is injected into the rest of the circuit 1, i.e.the substrate 3 and the set of interconnections and power supplynetworks of the circuit 1.

More specifically, the current IPvdd is a current consumed by the cellfor the switching operation. The current IPgnd is different from thecurrent provided IPvdd since a part of the current provided IPvdd isshunted towards the output loads and to the substrate 3 of the circuit.The current IBsub is a leakage current leaking towards the substratewhile the current IBcais is a leakage current leaking towards the wellof the circuit 1.

Furthermore, the links between the terminals of the cell and thesubstrate 3 are modeled by these impedances Z1-Z6 connected to oneanother. Furthermore, a capacitor C connecting two resistor networksmodels the link between the part of the N doped substrate and the Pdoped substrate. The macro-model 4 is connected to the rest of theintegrated circuit 1 by means of resistors R1-R4. The values of theelements Z1-Z6, C and R1-R4, which depend especially on a geometry ofthe cell, are known in principle for each cell studied.

As a variant, the macro-models may comprise several power supplies. Theparasitic elements of the NMOS and PMOS structures can also be modeleddifferently.

Naturally, other macro-models can be implemented in the method accordingto the invention.

To extract the current sources from the macro-model 4, each cell 2.1-2.4is modeled in a test environment. The cell 2.1 which comprises inputsE1-EN and outputs S1-SM is thus represented in its test environment inFIG. 3. The term “test environment” is understood to mean all theparameters external to the cell that have an influence on its behaviour,especially on the noise that it is capable of injecting into the circuit1.

More specifically, this cell 2.1 is modeled by means of a modelcontained in a set of data files known as Designkit. These data filesare used by the VHDL, SPICE or VITAL type digital circuit design andverification software programs. This model sets up models precisely ofeach physical phenomenon occurring in the cell 2.1 and enables amodeling of the different modes of noise injection of the transistorsthat form it. In one example, the cell 2.1 is modeled by an EKV, MM9,BSIM3v3 or BSIM4 type SPICE model and various parasitic elements such ascapacitors, resistors and diodes.

The cell 2.1 is powered by a generator 4 which can be modeled as beingideal. However, it is also possible to implement a model of generatorthat models the parasites and couplings of the power supply lines up toeach digital cell.

In this environment, the rise time RT and the fall time FT of thesignals U1-UN applied to the inputs E1-EN of the cell 2.1 are fixed.This rise time RT and fall time FT can be the minimum, maximum or mediumswitch-over times of the digital cells likely to control the inputs ofthe cell considered. The shorter the rise time (i.e. the more sudden theswitching), the greater is the noise injected by the observable cell.Conversely, the lengthier the rise time, the lower the noise injected bythe cell.

Furthermore, the value of the capacitive loads C1-CM connected to theoutputs S1-SM of the cell 2.1 is fixed. These loads C1-CM correspond toan internal input capacitance of the following cells connected to theoutputs of the cell 2.1. Several sets of capacitances can be used, thevalues of the output capacitances influencing the switching times of thecells as well as the noise generated by the cell 2.1 when switching.

A definition is then made of the switching patterns that will be appliedto the inputs E1-EN of the circuit by means of U1-UN. It may be recalledthat these patterns define the passage of the levels of the inputs ofthe cell from one state to another. A switching pattern is representedfor example at the top right-hand side of FIG. 3. Initially, the numberof states that can change in the pattern is defined. Then, it may bechosen to bring about variation in the inputs E1-EN according to a Graytype code. In this case, only one input changes in a switching pattern.As a variant, it is chosen to make several inputs vary at the same timein the switching pattern. As a variant, it is possible to take accountof the time lags between the changes in state of the inputs.

In a second stage, a number of switching patterns to be applied to theinputs E1-EN is chosen. It is thus possible to choose to apply all thepossible patterns at input, i.e. 2^(N).(2^(N)−1) patterns. However, sucha choice requires very lengthy execution time. Hence preferably alimited number of patterns will be chosen by a random draw of thepatterns which will be simulated, all the patterns being considered tobe equiprobable. Experience shows that limiting patterns in this wayprovides for a relevant estimation of the worst-case and best-casewaveforms provided that the size of the sample or estimator issufficient. This limiting of the patterns provides for a gain in time inthe extraction of the current sources and makes it easy to integrate thecurrent source extraction tool of the invention into a software program.As a variant, the patterns can be weighted so as to take account ofthose patterns that are most likely to be observed at input of the cell2.1.

Once the test environment is defined, the different switching patternsare applied to the inputs of the cell 2.1. For each switching pattern,simulation data stored in a memory 13 shown in FIG. 4 is obtained.

Thus, FIG. 5 a shows the temporal waveforms 15-17 of the noise sourceIBsub for three different switching patterns. These waveforms 15-17 mayhave different minimum and maximum values I(t) and dl/dt at differentpoints in time. It is therefore quite difficult to find out whichwaveform represents the worst case or the best case. The effect of thesewaveforms on the victims is furthermore difficult to estimate.

These temporal waveforms 15-17 are transposed to the frequency domain bymeans of a Fourier transform cell 18. Then, frequency spectra areobtained, the magnitude 19-22 of which is shown in FIG. 5 b and thephase 22 of which, oscillating between −pi and +pi, is shown in FIG. 5c. The waveforms are stored and re-utilized in their spectral form owingto the nature of the analysis algorithms of the system which implement amatrix resolution for each frequency and owing to the nature of thevictims which are analog or radio frequency type victims.

Then, in a step 24, a least squares approximation technique is performedon the real and imaginary parts of the frequency spectra. This step 24enables an approximation of each frequency spectrum 19-22 by twopolynomials: first polynomial approaching the real part of the spectrumand a second polynomial approaching the imaginary part of the spectrum.Then, a set of polynomials 25 is obtained, the coefficients of which arestored in a memory 26.

A storage of coefficients of this kind has the advantage of taking upless space than the storage of the points of the spectra and of enablinga re-use of the waveforms to reproduce different values of periods ofthe same signal corresponding to spacings of lines in the frequencydomain. Indeed, it is possible to reuse the spectra for differentperiods of the waveforms, it being possible to select lines of thesespectra 41-43 that are multiples of 1/T, T being the clock period.Another advantage of the storage of the polynomials is the reduction ofthe execution time during the computation of the sums of spectra for thecomputation of noise of a block as well as high precision of the resultobtained.

The blocks 14, 18, 23-25 forming the block 33 thus represent the stepsof extraction of the noise sources of the macro-models. Once the noisesources have been extracted, a statistical classification is made of thespectra obtained so as to identify the minimum and maximum noise sourcesof each cell corresponding to a worst case and a best case of noiseinjection by the cell.

To this end, the spectral densities of the spectra are computed fromtheir spectral lines. To obtain a classification of the spectraaccording to their noise level, it is deemed to be the case that thegreater the spectral density, the greater is the noise level. And thelower the spectral density, the lower is the level of noise generated bythe cell. Thus, the worst case source is extracted from the cell byextraction of the waveform with the greatest spectral density. And, thebest case source is extracted by extraction of the waveform with thelowest spectral density.

The spectral density can be computed throughout the frequency spectrum.However, this spectral density can also be computed for a range offrequencies DF or for a particular frequency line. Differentclassifications of waveforms are possible depending on the type ofcomputation of spectral density chosen and the range of frequencieschosen. In this step, it is also possible to determine a mean spectrum,a standard deviation between the spectra or any other piece ofstatistical data giving an indication concerning the noise that can beinjected by the cells.

As a variant, other methods could be used to compare the differentspectra with one another and classify them.

The following blocks 26-30 of FIG. 4 represent a phase 32 for rebuildinga noise model for a digital circuit. In other words, these blocks 26-30represent steps for using macro-models and extracted current sources tocompute a worst case noise, best case noise or any other possibility ina particular circuit.

More specifically, during this rebuilding phase, the best case or worstcase noises 26 for each cell are injected in spectral form in takingaccount of the switching times of the cells.

To this end, the invention uses a model 27 which models the switchinginstants of the cells in time. This model 27 makes it possible todetermine the progress in time of the number of cells called, i.e. theprogress in time of the number of cells in switching mode.

FIG. 6 thus gives the example of a histogram modeling a discretedistribution of inrush current surges during a clock period T. Thisgraph indicates the number of cells (an integer) likely to be called ateach time interval [ti, ti+1[. The instants t1-tP constitute a discretechopping of the period T into P time intervals.

During each period T, the number of cells in switching mode evolves, andthe digital cells transmit the signals from one cell to the next. Thisgraph thus models a switching activity proper to each clock period, thisactivity being linked to a modification of the inputs of a digitalblock. The number of cells in switching mode increases until it reachesa peak. This increase depends on a fan-out parameter which indicates thenumber of cells connected to the output of each cell whose outputschange their state. After the peak, the number of cells in a switchingstate diminishes until it reaches zero.

From the switching activity model 27, it is possible to determine theinstant at which the cells inject their noise into the substrate. Aswitching delay relative to a circuit clock signal edge is thenassociated with each cell, this delay representing the effective calltime of the cell and hence the moment at which the noise is injectedinto a cell. Depending on the case chosen (the best case or the worstcase), the switching activity model of the cells can also be adapted. Inparticular, the number of cells capable of switching and thereforeinjecting their noise can vary from one case to another.

Furthermore, different noise injection spectra are associated with eachcell depending on the case of operation chosen. In the worst case ofoperation, it is assumed that most of the cells or all the cells injectthe extracted waveform corresponding to their maximum noise. In the bestcase of operation, it is assumed that most of the cells or all the cellsinject the extracted waveform corresponding to their minimum noise. Inthe medium case of operation, computations are made on the extractedwaveforms to determine the medium waveforms of the noise sources of eachcell. For a large number of cells called, it is possible to choose thewaveforms randomly from among those that are extracted and available foreach cell.

Each cell therefore has an associated noise spectrum and an associatednoise injection time. A frequency sum of these spectra and of thesedelays is then obtained in a step 28. A resulting noise spectrum 29 isthen obtained in the frequency domain. Then, depending on therequirements of the analysis of the system, this noise spectrum 29 canthen be converted into a resultant noise time signal by means of aninverse Fourier transform cell 31. The block 32 thus makes it possibleto obtain a temporal or frequency waveform of noise that can be injectedby a digital block using knowledge of the noise sources of the extractedcells internal to this block and of a switching model.

To know if the circuit 1 is sensitive to the resulting noise, a noisesensitivity template is considered for each victim. This template givesthe noise sensitivity threshold of the victim for each frequency. Then,a test of noise sensitivity is performed by comparing the computed blocknoise and the template.

The table of FIG. 7 indicates the decisions of acceptance ornon-acceptance of three systems as a function of a result of theirsensitivity test performed in the worst case, the medium case and thebest case of noise injection. The letter R signifies that the testperformed by the system has been successful, i.e. that the noise levelcomputed in the system is acceptable given the sensitivity templates ofthe victims considered or the sensitivity test protocols for eachvictim. The letter NR signifies that the test performed on the systemhas failed, i.e. that the noise level computed in the system is notacceptable given the sensitivity templates considered or the sensitivitytest protocols for each victim.

More specifically, the system 1 has successfully undergone the noisesensitivity test in the worst case, the best case and the medium case ofnoise injection. The system 1 therefore has high immunity to noise andis therefore considered to be acceptable. This decision is taken whenthe test performed with the worst noise is successful. Thus, it iscertain that the system works whatever the level of noise injected inall its modes of use, including the marginal modes.

With the system 2, the noise sensitivity test has failed for all thecases of noise injection. The system 2 is therefore considered topossess poor noise immunity and must therefore be discarded fromproduction. This choice is made when it is clear that the sensitivitytest has failed in the best case of noise injection. Thus, it is certainthat the system 2 will never be able to perform properly.

With the system 3, the noise sensitivity test has been successful in thebest case and the medium case but has failed in the worst case ofinjection. Thus, it is difficult to determine if the system 3 isacceptable or not. To refine the analysis, it is possible to performtests by injecting intermediate noise levels into the system. In alllikelihood, modifications of architecture of the system 3 will have tobe done so that this system 3 becomes acceptable.

In one mode of implementation of the method of the invention, asensitivity test is first of all conducted with the worst case, thenwith the best case and finally with the medium case. Thus, it ispossible to know very soon if a system has high immunity to noise. Ifthe worst case has failed, other additional analyses are needed (bestcase medium case) to deepen the analysis of the system.

It can be noted that the worst case (and the best case respectively) ofoperation is not necessarily obtained by a choice of the worst (orrespectively the best) switching, environment and noise sourceparameters for the different cells. Indeed, these different cases ofoperation should be observable in real operation of the system. In otherwords, these cases of operation are not artificial cases but cases whichcan be encountered when the system works within its limits. It canhappen therefore that a choice of all the worst (and best) noiseinjection parameters respectively does not correspond to the worst (and,respectively, best) case of noise injection of a given system becausesuch a case could never occur.

Tests and experiments can be used to orient the relevant modelingchoices for the worst (and respectively best) cases which should not betoo pessimistic (or too optimistic respectively).

Naturally, the different steps of the method of the invention can beupdated by an electronic circuit or by means of a software programexecuted by a computer, the software program being recorded on a USBmemory, DVD, CD or floppy type carrier.

1-16. (canceled)
 17. A method for the estimating noise generated in acombined digital and analog and/or radio-frequency type system, thecombined system comprises elementary cells, each elementary cellperforming a function, the method comprising the steps of: modeling eachelementary cell of the combined system by a noise injectionmacro-module, said noise injection macro-model comprising currentsources to model the noise injected into the combined system by saideach elementary cell; extracting the current sources of said noiseinjection macro-models by simulation; defining a model of distributionof instants of switching of said elementary cells, the distributionmodel defining the instants at which said elementary cells of thecombined system switch over; re-using the current sources extracted insaid noise injection macro-models according to the distribution model;and computing observable noise within the combined system; and whereinthe step of re-using further comprises the step of injecting a marginalnoise into the combined system that can be injected by the currentsources, said marginal noise being either worst or best noise that canbe injected by the current sources during operation of the combinedsystem; wherein the worst noise being, as expressed in a frequencydomain, highest-level noise that can be injected by the current sourcesduring the operation of the combined system; and wherein the best noisebeing, as expressed in the frequency domain, lowest-level noise that canbe injected by the current sources during the operation of the combinedsystem.
 18. The method of claim 17, wherein the combined system is anintegrated circuit, said elementary cells being made on a substrate ofsaid integrated circuit; and wherein the step of modeling comprises thestep of macro-modeling noise current being propagated in the substrate,interconnections of said integrated circuit and in a package of saidintegrated circuit.
 19. The method of claim 18, wherein the step ofextracting comprises the steps of: modeling transistors that form saideach elementary cell; defining a test environment for said eachelementary cell based on parameters that have influence on the noisegenerated by said each elementary cell; applying different switchingpatterns to input terminals of said each elementary cell using voltagesources connected to the inputs terminals to obtain a noise sourcewaveform for each switching pattern; classifying source noise waveformsas a function of a noise level associated with the source noisewaveforms; and storing noise sources associated with the source noisewaveforms and said noise injection macro-model of said each elementarycell in a memory.
 20. The method of claim 19, wherein the step ofmodeling each elementary cell utilizes one of the following model: MM9,BSIM3 or BSIM4 type SPICE model.
 21. The method of claim 19, wherein thestep of defining the test environment comprises the steps of: fixing arise time (RT) and a fall time (FT) of signals of the current sources atan input of said each elementary cell; and fixing a value of acapacitive load connected to different outputs of said each elementarycell.
 22. The method of claim 21, wherein the step of defining the testenvironment further comprises the step of modeling a power supplynetwork of said each elementary cell considering parasites and powerline couplings of said power supply network connected to terminals ofsaid each elementary cell.
 23. The method of claim 19, furthercomprising the step of randomly drawing a sample of switching patternsto be applied to the input terminals of said each elementary cell fromamong all the possible switching patterns, these possible switchingpatterns being considered to be equally probable.
 24. The method ofclaim 19, wherein the step of classifying comprises the steps of:computing frequency spectra of the source noise waveforms by Fouriertransform; computing spectral densities of the frequency spectra; andclassifying the source noise waveforms as a function of spectral densityvalues.
 25. The method of claim 24, wherein the step computing spectraldensities comprises the step of computing the spectral densities of thefrequency spectra on an entire spectrum, on a frequency range (Df), orfor a particular spectral line.
 26. The method of claim 24, furthercomprising the steps of: selecting a noise source waveform whichcomprises a highest spectral density as a worst noise source of saidnoise injection macro-model; and selecting a noise source waveform whichcomprises a lowest spectral density as a best noise source of said noiseinjection macro-model.
 27. The method of claim 19, further comprisingthe steps of: computing, for each noise source waveform, a firstpolynomial which approaches a real part of a frequency spectrum of saideach noise source waveform and a second polynomial which approaches animaginary part of the frequency spectrum of said each noise sourcewaveform by a least squares approximation method; and storing, for saideach noise source waveform, coefficients of the first and secondpolynomials in a memory so that size of the source noise waveforms isreduced relative to a storage of points of an entire spectrum.
 28. Themethod of claim 27, wherein the step of computing observable noisewithin the combined system further comprises the steps of: computing asum of frequency spectra of the source noise waveforms of differentelementary cells using the first and second polynomials associated withsaid each elementary cells such that computation time of said sum beingshorter than computation time needed to compute a sum of the sourcenoise waveforms in a time domain; and reusing the first and secondpolynomials of the frequency spectra for different periods of the sourcenoise waveforms to select lines of the spectra that are multiples of1/T, T being a clock period of said integrated circuit.
 29. A method fortesting immunity to noise of a combined digital and/or analog and/orradio frequency type system, said combined system comprising digitalcells connected to one another through nodes of a circuit, each nodecorresponding to a connection between two digital cells or between adigital cell and a power supply network of the combined system, themethod comprising the steps of: (a) modeling the digital cells usingmacro-models comprising RLC type connection elements and noise sourceswhich model a noise injection by the digital cells in the combinedsystem; (b) connecting the macro-models with the rest of the combinedsystem using the RLC type connection elements of the macro-models; (c)using noise sources extracted in the macro-models so as to inject noiseinto the combined system′ (d) computing noise levels in each node of thecombined system; performing a sensitivity test of sensitivity of thecombined system to the noise injected, the sensitivity test beingsuccessful if computed noise is smaller than the sensitivity thresholdsof the combined system and failing if the computed noise is greater thanthe sensitivity thresholds; (e) re-using sources within the macro-modelsby injecting worst noise that can be injected by the digital cells intothe combined system, the worst noise being greatest noise that can beinjected into the combined system by the digital cells during operationof the combined system, and accepting the circuit if the sensitivitytest is successful with the worst noise injected.
 30. The method ofclaim 29, further comprising the following steps if the sensitivity testwith the worst noise injected fails: injecting into the combined systembest noise that can be injected by the digital cells, the best noisebeing the lowest noise that can be injected into the combined system bythe digital cells during the operation of the system; and discarding thecombined system if the sensitivity test fails.
 31. The method of claim29, further comprising the following step if the sensitivity test failswith the worst noise but is successful with the best noise: injectinginto the combined system a medium noise that can be injected by thedigital cells during the operation of the combined system; and modifyingan architecture of the circuit and repeating steps (a)-(e).
 32. A deviceoperable to estimate noise generated in a combined digital and analogand/or radio-frequency type system, the combined system compriseselementary cells, each elementary cell performing a function, the deviceperforming the following functions: modeling each elementary cell of thecombined system by a noise injection macro-module, said noise injectionmacro-model comprising current sources to model the noise injected intothe combined system by said each elementary cell; extracting the currentsources of said noise injection macro-models by simulation; defining amodel of distribution of instants of switching of said elementary cells,the distribution model defining the instants at which said elementarycells of the combined system switch over; re-using the current sourcesextracted in said noise injection macro-models according to thedistribution model; and computing observable noise within the combinedsystem; and wherein the step of re-using further comprises the step ofinjecting a marginal noise into the combined system that can be injectedby the current sources, said marginal noise being either worst or bestnoise that can be injected by the current sources during operation ofthe combined system; wherein the worst noise being, as expressed in afrequency domain, highest-level noise that can be injected by thecurrent sources during the operation of the combined system; and whereinthe best noise being, as expressed in the frequency domain, lowest-levelnoise that can be injected by the current sources during the operationof the combined system.
 33. A device operable to test immunity to noiseof a combined digital and/or analog and/or radio frequency type system,said combined system comprising digital cells connected to one anotherthrough nodes of a circuit, each node corresponding to a connectionbetween two digital cells or between a digital cell and a power supplynetwork of the combined system, the device performing the followingfunctions: (a) modeling the digital cells using macro-models comprisingRLC type connection elements and noise sources which model a noiseinjection by the digital cells in the combined system; (b) connectingthe macro-models with the rest of the combined system using the RLC typeconnection elements of the macro-models; (c) using noise sourcesextracted in the macro-models so as to inject noise into the combinedsystem′ (d) computing noise levels in each node of the combined system;performing a sensitivity test of sensitivity of the combined system tothe noise injected, the sensitivity test being successful if computednoise is smaller than the sensitivity thresholds of the combined systemand failing if the computed noise is greater than the sensitivitythresholds; (e) re-using sources within the macro-models by injectingworst noise that can be injected by the digital cells into the combinedsystem, the worst noise being greatest noise that can be injected intothe combined system by the digital cells during operation of thecombined system, and accepting the circuit if the sensitivity test issuccessful with the worst noise injected.